FPGA

Design Environment of Quantization-Aware Edge AI Hardware for Few-Shot Learning

This study aims to ensure consistency in accuracy throughout the entire design flow in the implementation of edge AI hardware for few-shot learning, by implementing fixed-point data processing in the pre-training and evaluation phases. Specifically, …

PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC

This paper tackles the challenges of implementing few-shot learning on embedded systems, specifically FPGA SoCs, a vital approach for adapting to diverse classification tasks, especially when the costs of data acquisition or labeling prove to be …

Pipelined Architecture for a Semantic Segmentation Neural Network on FPGA

Many machine vision tasks like urban sceneunderstanding rely on machine learning, and more specifically deep neural networks to provide accurate enough results to make technology like autonomous vehicles possible. FPGAs have proven to be an excellent …